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| author | Paolo Bonzini <pbonzini@redhat.com> | 2018-04-13 11:38:35 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-04-16 17:50:22 +0200 |
| commit | dd259935e4eec844dc3e5b8a7cd951cd658b4fb6 (patch) | |
| tree | 38f6a692fde1aec7d45e6ac01809aa2dfd243050 /arch/x86/kvm/x86.c | |
| parent | X86/KVM: Properly update 'tsc_offset' to represent the running guest (diff) | |
| download | linux-dd259935e4eec844dc3e5b8a7cd951cd658b4fb6.tar.xz linux-dd259935e4eec844dc3e5b8a7cd951cd658b4fb6.zip | |
kvm: x86: move MSR_IA32_TSC handling to x86.c
This is not specific to Intel/AMD anymore. The TSC offset is available
in vcpu->arch.tsc_offset.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/x86/kvm/x86.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 3f3fba58c960..51ecd381793b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2364,6 +2364,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; vcpu->arch.smbase = data; break; + case MSR_IA32_TSC: + kvm_write_tsc(vcpu, msr_info); + break; case MSR_SMI_COUNT: if (!msr_info->host_initiated) return 1; @@ -2607,6 +2610,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_IA32_UCODE_REV: msr_info->data = vcpu->arch.microcode_version; break; + case MSR_IA32_TSC: + msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset; + break; case MSR_MTRRcap: case 0x200 ... 0x2ff: return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data); |