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| author | Sean Christopherson <seanjc@google.com> | 2022-06-11 02:57:50 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-06-20 17:49:20 +0200 |
| commit | 0f4a7185270c4879fa40b33d7e07b6ac38353b34 (patch) | |
| tree | fde7d692cc3a7bb2496262439d417658bb5724c4 /arch/x86/kvm | |
| parent | KVM: x86: Give host userspace full control of MSR_IA32_MISC_ENABLES (diff) | |
| download | linux-0f4a7185270c4879fa40b33d7e07b6ac38353b34.tar.xz linux-0f4a7185270c4879fa40b33d7e07b6ac38353b34.zip | |
KVM: VMX: Give host userspace full control of MSR_IA32_PERF_CAPABILITIES
Do not clear manipulate MSR_IA32_PERF_CAPABILITIES in intel_pmu_refresh(),
i.e. give userspace full control over capability/read-only MSRs. KVM is
not a babysitter, it is userspace's responsiblity to provide a valid and
coherent vCPU model.
Attempting to "help" the guest by forcing a consistent model creates edge
cases, and ironicially leads to inconsistent behavior.
Example #1: KVM doesn't do intel_pmu_refresh() when userspace writes
the MSR.
Example #2: KVM doesn't clear the bits when the PMU is disabled, or when
there's no architectural PMU.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220611005755.753273-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm')
| -rw-r--r-- | arch/x86/kvm/vmx/pmu_intel.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 3b324ce0b142..b62012766226 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -619,8 +619,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) pmu->pebs_enable_mask = ~((1ull << pmu->nr_arch_gp_counters) - 1); } - } else { - vcpu->arch.perf_capabilities &= ~PERF_CAP_PEBS_MASK; } } |