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| author | Ingo Molnar <mingo@elte.hu> | 2008-04-27 23:21:03 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-04-30 23:15:34 +0200 |
| commit | ed5e233284bc4aff965df7351da8426aa188c8f9 (patch) | |
| tree | eee6c7911672b3af57ab3f64b1e2adc4a78ff64c /arch/x86/mach-voyager | |
| parent | hpet: fix (diff) | |
| download | linux-ed5e233284bc4aff965df7351da8426aa188c8f9.tar.xz linux-ed5e233284bc4aff965df7351da8426aa188c8f9.zip | |
x86, voyager: fix ioremap_nocache()
James Bottomley reported that the following commit:
| commit 6371b495991debfd1417b17c2bc4f7d7bae05739
| Author: Ingo Molnar <mingo@elte.hu>
| Date: Wed Jan 30 13:33:40 2008 +0100
|
| x86: change ioremap() to default to uncached
broke Voyager.
James says:
" it broke a class of voyager machines: those which
rely on the quad interrupt controller (QIC). The precis of why they
broke is because the QIC does IPIs (or CPIs in its terminology) via
cache line interference: you interrupt a processor by moving a
designated memory area to write exclusive in the cache (by simply
writing to the line) and the CPU acks the interrupt by moving it back to
read shared (by reading from it). That area, is, of course, mapped by
ioremap, so reversing the ioremap semantics and adding the uncached bit
completely breaks the QIC. "
Sorry about that!
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/mach-voyager')
| -rw-r--r-- | arch/x86/mach-voyager/voyager_cat.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/mach-voyager/voyager_cat.c b/arch/x86/mach-voyager/voyager_cat.c index ecab9fff0fd1..2ad598c104af 100644 --- a/arch/x86/mach-voyager/voyager_cat.c +++ b/arch/x86/mach-voyager/voyager_cat.c @@ -877,7 +877,7 @@ void __init voyager_cat_init(void) request_resource(&iomem_resource, res); } - qic_addr = (unsigned long)ioremap(qic_addr, 0x400); + qic_addr = (unsigned long)ioremap_cache(qic_addr, 0x400); for (j = 0; j < 4; j++) { __u8 cpu; |