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| author | Borislav Petkov <bp@suse.de> | 2018-06-22 11:34:11 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-06-22 14:52:13 +0200 |
| commit | 7ce2f0393ea2396142b7faf6ee9b1f3676d08a5f (patch) | |
| tree | b1eaf2f06d1ab8c74f9d73df47fab8e444e75ffe /arch/x86/mm/init.c | |
| parent | x86/cpufeatures: Add detection of L1D cache flush support. (diff) | |
| download | linux-7ce2f0393ea2396142b7faf6ee9b1f3676d08a5f.tar.xz linux-7ce2f0393ea2396142b7faf6ee9b1f3676d08a5f.zip | |
x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
The TOPOEXT reenablement is a workaround for broken BIOSen which didn't
enable the CPUID bit. amd_get_topology_early(), however, relies on
that bit being set so that it can read out the CPUID leaf and set
smp_num_siblings properly.
Move the reenablement up to early_init_amd(). While at it, simplify
amd_get_topology_early().
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/mm/init.c')
0 files changed, 0 insertions, 0 deletions