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author | Paolo Bonzini <pbonzini@redhat.com> | 2022-02-05 06:58:25 +0100 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-02-05 06:58:25 +0100 |
commit | 7e6a6b400db8048bd1c06e497e338388413cf5bc (patch) | |
tree | 794f9fcdc7a1bfb9a2812e90fc76809d810203b2 /arch/x86/mm/init.c | |
parent | KVM: x86: Use ERR_PTR_USR() to return -EFAULT as a __user pointer (diff) | |
parent | KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata (diff) | |
download | linux-7e6a6b400db8048bd1c06e497e338388413cf5bc.tar.xz linux-7e6a6b400db8048bd1c06e497e338388413cf5bc.zip |
Merge tag 'kvmarm-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 5.17, take #2
- A couple of fixes when handling an exception while a SError has been
delivered
- Workaround for Cortex-A510's single-step[ erratum
Diffstat (limited to 'arch/x86/mm/init.c')
-rw-r--r-- | arch/x86/mm/init.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 1895986842b9..4ba024d5b63a 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -714,6 +714,11 @@ static void __init memory_map_bottom_up(unsigned long map_start, static void __init init_trampoline(void) { #ifdef CONFIG_X86_64 + /* + * The code below will alias kernel page-tables in the user-range of the + * address space, including the Global bit. So global TLB entries will + * be created when using the trampoline page-table. + */ if (!kaslr_memory_enabled()) trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)]; else |