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authorRoland Dreier <rdreier@cisco.com>2009-09-24 00:33:23 +0200
committerIngo Molnar <mingo@elte.hu>2009-09-24 11:35:19 +0200
commitea01c0d7315d6e3218fd22a6947c5b09305fcf65 (patch)
treeeb89de83cfb03f66447c911b6f5f6e60168bfb5b /arch/x86/mm/pat.c
parentx86: mce: Use safer ways to access MCE registers (diff)
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x86: Reduce verbosity of "TSC is reliable" message
On modern systems, the kernel prints the message Skipping synchronization checks as TSC is reliable. once for every non-boot CPU. This gets kind of ridiculous on huge systems; for example, on a 64-thread system I was lucky enough to get: $ dmesg | grep 'TSC is reliable' | wc 63 567 4221 There's no point to doing this for every CPU, since the code is just checking the boot CPU anyway, so change this to a printk_once() to make the message appears only once. Signed-off-by: Roland Dreier <rolandd@cisco.com> LKML-Reference: <adazl8l2swc.fsf@cisco.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mm/pat.c')
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