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authorRobert Richter <robert.richter@amd.com>2009-05-22 19:47:38 +0200
committerRobert Richter <robert.richter@amd.com>2009-06-11 19:42:11 +0200
commit74c9a5c341bb1f6cbb5095b07c77230f19682ce8 (patch)
tree9299c89bb9bd7efabea7b603c86d0b9d13592c0a /arch/x86/oprofile/op_model_ppro.c
parentx86/oprofile: remove MSR macros for AMD cpus (diff)
downloadlinux-74c9a5c341bb1f6cbb5095b07c77230f19682ce8.tar.xz
linux-74c9a5c341bb1f6cbb5095b07c77230f19682ce8.zip
x86/oprofile: remove MSR macros for ppro cpus
The macros CTRL_READ() and CTRL_WRITE() make the code hard to read and maintain. This patch replaces them by rdmsr()/wrmsr() functions and simplifies the code. Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/oprofile/op_model_ppro.c')
-rw-r--r--arch/x86/oprofile/op_model_ppro.c19
1 files changed, 8 insertions, 11 deletions
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index a922a1a815c3..6c5d288c566e 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -27,9 +27,6 @@ static int num_counters = 2;
static int counter_width = 32;
#define CTR_OVERFLOWED(n) (!((n) & (1ULL<<(counter_width-1))))
-
-#define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls[(c)].addr), (l), (h)); } while (0)
-#define CTRL_WRITE(l, h, msrs, c) do {wrmsr((msrs->controls[(c)].addr), (l), (h)); } while (0)
#define CTRL_CLEAR(x) (x &= (1<<21))
#define CTRL_SET_EVENT(val, e) (val |= e)
@@ -88,9 +85,9 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs)
for (i = 0 ; i < num_counters; ++i) {
if (unlikely(!CTRL_IS_RESERVED(msrs, i)))
continue;
- CTRL_READ(low, high, msrs, i);
+ rdmsr(msrs->controls[i].addr, low, high);
CTRL_CLEAR(low);
- CTRL_WRITE(low, high, msrs, i);
+ wrmsr(msrs->controls[i].addr, low, high);
}
/* avoid a false detection of ctr overflows in NMI handler */
@@ -107,14 +104,14 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs)
wrmsrl(msrs->counters[i].addr, -reset_value[i]);
- CTRL_READ(low, high, msrs, i);
+ rdmsr(msrs->controls[i].addr, low, high);
CTRL_CLEAR(low);
CTRL_SET_ENABLE(low);
CTRL_SET_USR(low, counter_config[i].user);
CTRL_SET_KERN(low, counter_config[i].kernel);
CTRL_SET_UM(low, counter_config[i].unit_mask);
CTRL_SET_EVENT(low, counter_config[i].event);
- CTRL_WRITE(low, high, msrs, i);
+ wrmsr(msrs->controls[i].addr, low, high);
} else {
reset_value[i] = 0;
}
@@ -162,9 +159,9 @@ static void ppro_start(struct op_msrs const * const msrs)
return;
for (i = 0; i < num_counters; ++i) {
if (reset_value[i]) {
- CTRL_READ(low, high, msrs, i);
+ rdmsr(msrs->controls[i].addr, low, high);
CTRL_SET_ACTIVE(low);
- CTRL_WRITE(low, high, msrs, i);
+ wrmsr(msrs->controls[i].addr, low, high);
}
}
}
@@ -180,9 +177,9 @@ static void ppro_stop(struct op_msrs const * const msrs)
for (i = 0; i < num_counters; ++i) {
if (!reset_value[i])
continue;
- CTRL_READ(low, high, msrs, i);
+ rdmsr(msrs->controls[i].addr, low, high);
CTRL_SET_INACTIVE(low);
- CTRL_WRITE(low, high, msrs, i);
+ wrmsr(msrs->controls[i].addr, low, high);
}
}