diff options
| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2011-11-10 14:18:09 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-11-16 00:50:30 +0100 |
| commit | b82e324b3c46a554595c12b45465d1943a57326c (patch) | |
| tree | dd74e36cd1d04948ee76dcfbdb9894190e689a40 /arch/x86/platform | |
| parent | tty_ldisc: remove unnecessary negative return check for wait_event_timeout (diff) | |
| download | linux-b82e324b3c46a554595c12b45465d1943a57326c.tar.xz linux-b82e324b3c46a554595c12b45465d1943a57326c.zip | |
serial, mfd: don't hardcode the console
Add support to specify which HSU port to use as an early console. This can
be selected by passing "earlyprintk=hsu<n>" on the kernel command line. By
default port 0 is still used.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch/x86/platform')
| -rw-r--r-- | arch/x86/platform/mrst/early_printk_mrst.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/x86/platform/mrst/early_printk_mrst.c b/arch/x86/platform/mrst/early_printk_mrst.c index 25bfdbb5b130..3c6e328483c7 100644 --- a/arch/x86/platform/mrst/early_printk_mrst.c +++ b/arch/x86/platform/mrst/early_printk_mrst.c @@ -245,16 +245,24 @@ struct console early_mrst_console = { * Following is the early console based on Medfield HSU (High * Speed UART) device. */ -#define HSU_PORT2_PADDR 0xffa28180 +#define HSU_PORT_BASE 0xffa28080 static void __iomem *phsu; -void hsu_early_console_init(void) +void hsu_early_console_init(const char *s) { + unsigned long paddr, port = 0; u8 lcr; - phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE, - HSU_PORT2_PADDR); + /* + * Select the early HSU console port if specified by user in the + * kernel command line. + */ + if (*s && !kstrtoul(s, 10, &port)) + port = clamp_val(port, 0, 2); + + paddr = HSU_PORT_BASE + port * 0x80; + phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE, paddr); /* Disable FIFO */ writeb(0x0, phsu + UART_FCR); |