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authorWill Deacon <will.deacon@arm.com>2016-09-22 12:25:25 +0200
committerWill Deacon <will.deacon@arm.com>2017-02-09 19:31:25 +0100
commit2bf47e194608192b7346baea1d57929a87ced3f9 (patch)
treeac7aebfccf4d312cf1d20293b94a9e145d1c69aa /arch/x86/realmode
parentarm64: arch_timer: document Hisilicon erratum 161010101 (diff)
downloadlinux-2bf47e194608192b7346baea1d57929a87ced3f9.tar.xz
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arm64: head.S: Enable EL1 (host) access to SPE when entered at EL2
The SPE architecture requires each exception level to enable access to the SPE controls for the exception level below it, since additional context-switch logic may be required to handle the buffer safely. This patch allows EL1 (host) access to the SPE controls when entered at EL2. Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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