diff options
| author | Kan Liang <kan.liang@linux.intel.com> | 2020-01-28 19:31:17 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2020-02-11 13:17:48 +0100 |
| commit | eda23b387f6c4bb2971ac7e874a09913f533b22c (patch) | |
| tree | 6c1d963c2e49683a11a15226f13669a28d0c6cf4 /arch/x86 | |
| parent | arm/patch: Fix !MMU compile (diff) | |
| download | linux-eda23b387f6c4bb2971ac7e874a09913f533b22c.tar.xz linux-eda23b387f6c4bb2971ac7e874a09913f533b22c.zip | |
perf/x86/intel: Add Elkhart Lake support
Elkhart Lake also uses Tremont CPU. From the perspective of Intel PMU,
there is nothing changed compared with Jacobsville.
Share the perf code with Jacobsville.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/1580236279-35492-1-git-send-email-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/events/intel/core.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 3be51aa06e67..dff6623804c2 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4765,6 +4765,7 @@ __init int intel_pmu_init(void) break; case INTEL_FAM6_ATOM_TREMONT_D: + case INTEL_FAM6_ATOM_TREMONT: x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, glp_hw_cache_event_ids, sizeof(hw_cache_event_ids)); |