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| author | Roland Dreier <rdreier@cisco.com> | 2009-10-15 23:21:14 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-10-16 09:20:03 +0200 |
| commit | 93ae5012a79b11e7fc855b52c7ce1e16fe1540b0 (patch) | |
| tree | ca7623712fb68d8f309684a378a5bb1a4a3df656 /arch/x86 | |
| parent | x86, UV: Fix information in __uv_hub_info structure (diff) | |
| download | linux-93ae5012a79b11e7fc855b52c7ce1e16fe1540b0.tar.xz linux-93ae5012a79b11e7fc855b52c7ce1e16fe1540b0.zip | |
x86: Don't print number of MCE banks for every CPU
The MCE initialization code explicitly says it doesn't handle
asymmetric configurations where different CPUs support different
numbers of MCE banks, and it prints a big warning in that case.
Therefore, printing the "mce: CPU supports <x> MCE banks"
message into the kernel log for every CPU is pure redundancy
that clutters the log significantly for systems with lots of
CPUs.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
LKML-Reference: <adaeip473qt.fsf@cisco.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index b1598a9436d0..721a77ca8115 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1214,7 +1214,8 @@ static int __cpuinit mce_cap_init(void) rdmsrl(MSR_IA32_MCG_CAP, cap); b = cap & MCG_BANKCNT_MASK; - printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b); + if (!banks) + printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b); if (b > MAX_NR_BANKS) { printk(KERN_WARNING |