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authorRobin Murphy <robin.murphy@arm.com>2018-07-24 00:16:07 +0200
committerChristoph Hellwig <hch@lst.de>2018-07-27 19:01:04 +0200
commitf07d141fe9430cdf9f8a65a87c4136bd83b8ab2e (patch)
tree779f6966e477d437732e08f26a6b5c3b5dddc80c /arch/x86
parentACPI/IORT: Support address size limit for root complexes (diff)
downloadlinux-f07d141fe9430cdf9f8a65a87c4136bd83b8ab2e.tar.xz
linux-f07d141fe9430cdf9f8a65a87c4136bd83b8ab2e.zip
dma-mapping: Generalise dma_32bit_limit flag
Whilst the notion of an upstream DMA restriction is most commonly seen in PCI host bridges saddled with a 32-bit native interface, a more general version of the same issue can exist on complex SoCs where a bus or point-to-point interconnect link from a device's DMA master interface to another component along the path to memory (often an IOMMU) may carry fewer address bits than the interfaces at both ends nominally support. In order to properly deal with this, the first step is to expand the dma_32bit_limit flag into an arbitrary mask. To minimise the impact on existing code, we'll make sure to only consider this new mask valid if set. That makes sense anyway, since a mask of zero would represent DMA not being wired up at all, and that would be better handled by not providing valid ops in the first place. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/pci-dma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index ab5d9dd668d2..80f9fe8d27d0 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -175,7 +175,7 @@ rootfs_initcall(pci_iommu_init);
static int via_no_dac_cb(struct pci_dev *pdev, void *data)
{
- pdev->dev.dma_32bit_limit = true;
+ pdev->dev.bus_dma_mask = DMA_BIT_MASK(32);
return 0;
}