summaryrefslogtreecommitdiffstats
path: root/arch/x86
diff options
context:
space:
mode:
authorThomas Gleixner <tglx@linutronix.de>2007-10-17 18:04:36 +0200
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-17 20:16:06 +0200
commit6a61f6a55708f5e50c4d78934199e7e9257e6aa2 (patch)
treeb834e5a3a4a73b6c6412afbb3068b4ee32fe936c /arch/x86
parentx86: remove reminder of i386 irqstat per cpu conversion (diff)
downloadlinux-6a61f6a55708f5e50c4d78934199e7e9257e6aa2.tar.xz
linux-6a61f6a55708f5e50c4d78934199e7e9257e6aa2.zip
x86: clean up struct irqaction initializers
clean up struct irqaction initializers to C99. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/i8259_32.c6
-rw-r--r--arch/x86/mach-default/setup.c6
-rw-r--r--arch/x86/mach-voyager/setup.c6
3 files changed, 15 insertions, 3 deletions
diff --git a/arch/x86/kernel/i8259_32.c b/arch/x86/kernel/i8259_32.c
index 679bb33acbf1..d34a10cc13a7 100644
--- a/arch/x86/kernel/i8259_32.c
+++ b/arch/x86/kernel/i8259_32.c
@@ -349,7 +349,11 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
* New motherboards sometimes make IRQ 13 be a PCI interrupt,
* so allow interrupt sharing.
*/
-static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL };
+static struct irqaction fpu_irq = {
+ .handler = math_error_irq,
+ .mask = CPU_MASK_NONE,
+ .name = "fpu",
+};
void __init init_ISA_irqs (void)
{
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
index 1bd82983986d..3f08010f3517 100644
--- a/arch/x86/mach-default/setup.c
+++ b/arch/x86/mach-default/setup.c
@@ -35,7 +35,11 @@ void __init pre_intr_init_hook(void)
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
-static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
+static struct irqaction irq2 = {
+ .handler = no_action,
+ .mask = CPU_MASK_NONE,
+ .name = "cascade",
+};
/**
* intr_init_hook - post gate setup interrupt initialisation
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index a0ab4002abcd..3bef977cb29b 100644
--- a/arch/x86/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
@@ -18,7 +18,11 @@ void __init pre_intr_init_hook(void)
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
-static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
+static struct irqaction irq2 = {
+ .handler = no_action,
+ .mask = CPU_MASK_NONE,
+ .name = "cascade",
+};
void __init intr_init_hook(void)
{