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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2014-02-19 12:52:30 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-02-19 17:12:24 +0100 |
| commit | 3e11e818bfd7bd4a8e1214970337bab73ffed32d (patch) | |
| tree | 064ee3ebe0532e9d4c7e04fd7654aa81d00828a7 /arch/x86 | |
| parent | x86, tsc: Fallback to normal calibration if fast MSR calibration fails (diff) | |
| download | linux-3e11e818bfd7bd4a8e1214970337bab73ffed32d.tar.xz linux-3e11e818bfd7bd4a8e1214970337bab73ffed32d.zip | |
x86: tsc: Add missing Baytrail frequency to the table
Intel Baytrail is based on Silvermont core so MSR_FSB_FREQ[2:0] == 0 means
that the CPU reference clock runs at 83.3MHz. Add this missing frequency to
the table.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Bin Gao <bin.gao@linux.intel.com>
Cc: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: http://lkml.kernel.org/r/1392810750-18660-2-git-send-email-mika.westerberg@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/tsc_msr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 5dfff5809e74..92ae6acac8a7 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -53,7 +53,7 @@ static struct freq_desc freq_desc_tables[] = { /* TNG */ { 6, 0x4a, 1, { 0, FREQ_100, FREQ_133, 0, 0, 0, 0, 0 } }, /* VLV2 */ - { 6, 0x37, 1, { 0, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } }, + { 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } }, /* ANN */ { 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } }, }; |