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authorRalf Baechle <ralf@linux-mips.org>2005-10-01 21:22:39 +0200
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 20:32:34 +0200
commit65f1f5a2c3cdb0570806fe4e5512945673dfa199 (patch)
tree61772813b74f1b3064a51ba37f36d6093eadeed7 /arch/x86_64/kernel/acpi
parentProvide 64-bit address space definitions for the Sibyte SB1 CPU core. (diff)
downloadlinux-65f1f5a2c3cdb0570806fe4e5512945673dfa199.tar.xz
linux-65f1f5a2c3cdb0570806fe4e5512945673dfa199.zip
Don't copy SB1 cache error handler to uncached memory.
This may have made sense on a paranoid day with pass 1 BCM1250 processors that were throwing cache error exception left and right for no good reason. On modern silicion that hardly makes sense and the code had gotten just an obscurity ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/x86_64/kernel/acpi')
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