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| author | Ravikiran G Thirumalai <kiran@scalex86.org> | 2006-01-11 22:43:57 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-12 04:04:53 +0100 |
| commit | c11efdf94d3152443c11334720824bb6c7f6c655 (patch) | |
| tree | d4185d8de8b855aca51b6bec730aeab3342e2a0f /arch/x86_64/kernel/head.S | |
| parent | [PATCH] x86_64: Allow compilation on a 32bit biarch toolchain (diff) | |
| download | linux-c11efdf94d3152443c11334720824bb6c7f6c655.tar.xz linux-c11efdf94d3152443c11334720824bb6c7f6c655.zip | |
[PATCH] x86_64: Align and pad x86_64 GDT on page boundary
This patch is on the same lines as Zachary Amsden's i386 GDT page alignemnt
patch in -mm, but for x86_64.
Patch to align and pad x86_64 GDT on page boundries.
[AK: some minor cleanups and fixed incorrect TLS initialization
in CPU init.]
Signed-off-by: Nippun Goel <nippung@calsoftinc.com>
Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/kernel/head.S')
| -rw-r--r-- | arch/x86_64/kernel/head.S | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S index 15290968e49d..1d216a9fc6d8 100644 --- a/arch/x86_64/kernel/head.S +++ b/arch/x86_64/kernel/head.S @@ -379,7 +379,7 @@ gdt: * Also sysret mandates a special GDT layout */ -.align L1_CACHE_BYTES +.align PAGE_SIZE /* The TLS descriptors are currently at a different place compared to i386. Hopefully nobody expects them at a fixed place (Wine?) */ @@ -401,10 +401,11 @@ ENTRY(cpu_gdt_table) gdt_end: /* asm/segment.h:GDT_ENTRIES must match this */ /* This should be a multiple of the cache line size */ - /* GDTs of other CPUs: */ - .fill (GDT_SIZE * NR_CPUS) - (gdt_end - cpu_gdt_table) + /* GDTs of other CPUs are now dynamically allocated */ + + /* zero the remaining page */ + .fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0 - .align L1_CACHE_BYTES ENTRY(idt_table) .rept 256 .quad 0 |