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author | Max Filippov <jcmvbkbc@gmail.com> | 2012-11-28 08:33:02 +0100 |
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committer | Chris Zankel <chris@zankel.net> | 2012-12-19 06:10:22 +0100 |
commit | 00273125c39be9cbf619aef90147354a9ed8c385 (patch) | |
tree | 331f33a0a31f9306f4612ecc25c4c9a476840966 /arch/xtensa/Kconfig.debug | |
parent | xtensa: add trap_set_handler function (diff) | |
download | linux-00273125c39be9cbf619aef90147354a9ed8c385.tar.xz linux-00273125c39be9cbf619aef90147354a9ed8c385.zip |
xtensa: add s32c1i sanity check
Add a brief sanity test of S32C1I functionality. This instruction
is needed by the kernel and userland as part of the base ABI
(including GCC atomic builtins, certain threading packages, future
atomic support in the C++ standard, etc). However, correct operation
of this instruction requires some cooperation by hardware external to
the processor (such as bus bridge, bus fabric, or memory controller).
Minimally exercising this mechanism and reporting explicit status
early in the boot process is helpful to chip vendors using the Linux
kernel as a benchmark of correctness of hardware.
As it turns out, S32C1I is not exercised by the kernel and by uClibc
based userland as of early June 2008. This is expected to change
soon as both incorporate more recent open source developments.
Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/Kconfig.debug')
-rw-r--r-- | arch/xtensa/Kconfig.debug | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/xtensa/Kconfig.debug b/arch/xtensa/Kconfig.debug index be5fb4c6243f..a34010e0e51c 100644 --- a/arch/xtensa/Kconfig.debug +++ b/arch/xtensa/Kconfig.debug @@ -13,4 +13,15 @@ config LD_NO_RELAX Enabling this option improves the link time but increases the code size, and possibly execution time. +config S32C1I_SELFTEST + bool "Perform S32C1I instruction self-test at boot" + default y + help + Enable this option to test S32C1I instruction behavior at boot. + Correct operation of this instruction requires some cooperation from hardware + external to the processor (such as bus bridge, bus fabric, or memory controller). + It is easy to make wrong hardware configuration, this test should catch it early. + + Say 'N' on stable hardware. + endmenu |