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| author | Max Filippov <jcmvbkbc@gmail.com> | 2023-06-14 01:51:18 +0200 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2023-06-14 06:56:27 +0200 |
| commit | f29cf77609cc401d28e2e7ec5c57d9d178ef347d (patch) | |
| tree | 54198dcf0f6c2fd2d1720845d9b1f2302211cb55 /arch/xtensa/include/asm/traps.h | |
| parent | xtensa: rearrange unaligned exception handler (diff) | |
| download | linux-f29cf77609cc401d28e2e7ec5c57d9d178ef347d.tar.xz linux-f29cf77609cc401d28e2e7ec5c57d9d178ef347d.zip | |
xtensa: add load/store exception handler
Memory attached to instruction bus of the xtensa CPU is only accessible
for a limited subset of opcodes. Other opcodes generate an exception
with the load/store error cause code. This property complicates use of
such systems. Provide a handler that recognizes and transparently fixes
such exceptions. The following opcodes are recognized when used outside
of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/include/asm/traps.h')
| -rw-r--r-- | arch/xtensa/include/asm/traps.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h index acffb02f8760..212c3b9ff407 100644 --- a/arch/xtensa/include/asm/traps.h +++ b/arch/xtensa/include/asm/traps.h @@ -47,6 +47,7 @@ __init trap_set_handler(int cause, xtensa_exception_handler *handler); asmlinkage void fast_illegal_instruction_user(void); asmlinkage void fast_syscall_user(void); asmlinkage void fast_alloca(void); +asmlinkage void fast_load_store(void); asmlinkage void fast_unaligned(void); asmlinkage void fast_second_level_miss(void); asmlinkage void fast_store_prohibited(void); @@ -64,6 +65,10 @@ void do_unhandled(struct pt_regs *regs); static inline void __init early_trap_init(void) { static struct exc_table init_exc_table __initdata = { +#ifdef CONFIG_XTENSA_LOAD_STORE + .fast_kernel_handler[EXCCAUSE_LOAD_STORE_ERROR] = + fast_load_store, +#endif #ifdef CONFIG_MMU .fast_kernel_handler[EXCCAUSE_DTLB_MISS] = fast_second_level_miss, |