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authorMax Filippov <jcmvbkbc@gmail.com>2013-07-03 18:23:28 +0200
committerChris Zankel <chris@zankel.net>2013-09-06 18:47:41 +0200
commit99d5040ebc3cccc90dfe031f615ac3fbc79905b6 (patch)
tree04d720df138145f5cb4efd4cf4358c88d44b19d3 /arch/xtensa/include/asm
parentxtensa: enable kernel preemption (diff)
downloadlinux-99d5040ebc3cccc90dfe031f615ac3fbc79905b6.tar.xz
linux-99d5040ebc3cccc90dfe031f615ac3fbc79905b6.zip
xtensa: keep a3 and excsave1 on entry to exception handlers
Based on the SMP patch by Joe Taylor and subsequent fixes. Preserve exception table pointer (normally stored in excsave1 SR) as it cannot be easily restored in SMP environment. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/include/asm')
-rw-r--r--arch/xtensa/include/asm/regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h
index b24de6717020..4ba9f516b0e2 100644
--- a/arch/xtensa/include/asm/regs.h
+++ b/arch/xtensa/include/asm/regs.h
@@ -82,6 +82,7 @@
#define PS_CALLINC_SHIFT 16
#define PS_CALLINC_MASK 0x00030000
#define PS_OWB_SHIFT 8
+#define PS_OWB_WIDTH 4
#define PS_OWB_MASK 0x00000F00
#define PS_RING_SHIFT 6
#define PS_RING_MASK 0x000000C0