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authorMax Filippov <jcmvbkbc@gmail.com>2016-04-11 20:07:30 +0200
committerMax Filippov <jcmvbkbc@gmail.com>2016-07-24 05:33:57 +0200
commitf1883aa7d63e3be92ad18da7a1bfc6c9b15c4f9a (patch)
tree86839f71ee3af439a1a43ca548957728568a1aa3 /arch/xtensa/include
parentxtensa: fix __ffs result type (diff)
downloadlinux-f1883aa7d63e3be92ad18da7a1bfc6c9b15c4f9a.tar.xz
linux-f1883aa7d63e3be92ad18da7a1bfc6c9b15c4f9a.zip
xtensa: move kernel mapping addresses into kmem_layout.h
Create a header dedicated to memory layout definitions. Include it from places where these definitions are needed. Express vmalloc area address, VIRTUAL_MEMORY_ADDRESS and KERNELOFFSET through KSEG address. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/include')
-rw-r--r--arch/xtensa/include/asm/kmem_layout.h25
-rw-r--r--arch/xtensa/include/asm/page.h10
-rw-r--r--arch/xtensa/include/asm/pgtable.h7
-rw-r--r--arch/xtensa/include/asm/vectors.h5
4 files changed, 33 insertions, 14 deletions
diff --git a/arch/xtensa/include/asm/kmem_layout.h b/arch/xtensa/include/asm/kmem_layout.h
new file mode 100644
index 000000000000..4eb43b65a34d
--- /dev/null
+++ b/arch/xtensa/include/asm/kmem_layout.h
@@ -0,0 +1,25 @@
+/*
+ * Kernel virtual memory layout definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of
+ * this archive for more details.
+ *
+ * Copyright (C) 2016 Cadence Design Systems Inc.
+ */
+
+#ifndef _XTENSA_KMEM_LAYOUT_H
+#define _XTENSA_KMEM_LAYOUT_H
+
+#include <asm/types.h>
+
+/*
+ * Fixed TLB translations in the processor.
+ */
+
+#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
+#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
+#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
+#define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000)
+
+#endif
diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h
index ad38500471fa..fd12a1977ba8 100644
--- a/arch/xtensa/include/asm/page.h
+++ b/arch/xtensa/include/asm/page.h
@@ -15,15 +15,7 @@
#include <asm/types.h>
#include <asm/cache.h>
#include <platform/hardware.h>
-
-/*
- * Fixed TLB translations in the processor.
- */
-
-#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
-#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
-#define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000)
-#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
+#include <asm/kmem_layout.h>
/*
* PAGE_SHIFT determines the page size
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h
index fb02fdc5ecee..8aa0e0d9cbb2 100644
--- a/arch/xtensa/include/asm/pgtable.h
+++ b/arch/xtensa/include/asm/pgtable.h
@@ -13,6 +13,7 @@
#include <asm-generic/pgtable-nopmd.h>
#include <asm/page.h>
+#include <asm/kmem_layout.h>
/*
* We only use two ring levels, user and kernel space.
@@ -68,9 +69,9 @@
* Virtual memory area. We keep a distance to other memory regions to be
* on the safe side. We also use this area for cache aliasing.
*/
-#define VMALLOC_START 0xC0000000
-#define VMALLOC_END 0xC7FEFFFF
-#define TLBTEMP_BASE_1 0xC7FF0000
+#define VMALLOC_START (XCHAL_KSEG_CACHED_VADDR - 0x10000000)
+#define VMALLOC_END (VMALLOC_START + 0x07FEFFFF)
+#define TLBTEMP_BASE_1 (VMALLOC_END + 1)
#define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
#if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE
#define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE)
diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h
index 288c776736d3..482171051ff0 100644
--- a/arch/xtensa/include/asm/vectors.h
+++ b/arch/xtensa/include/asm/vectors.h
@@ -20,6 +20,7 @@
#include <variant/core.h>
#include <platform/hardware.h>
+#include <asm/kmem_layout.h>
#if XCHAL_HAVE_PTP_MMU
#define XCHAL_KIO_CACHED_VADDR 0xe0000000
@@ -48,10 +49,10 @@ static inline unsigned long xtensa_get_kio_paddr(void)
#if defined(CONFIG_MMU)
/* Will Become VECBASE */
-#define VIRTUAL_MEMORY_ADDRESS 0xD0000000
+#define VIRTUAL_MEMORY_ADDRESS XCHAL_KSEG_CACHED_VADDR
/* Image Virtual Start Address */
-#define KERNELOFFSET 0xD0003000
+#define KERNELOFFSET (XCHAL_KSEG_CACHED_VADDR + 0x3000)
#if defined(XCHAL_HAVE_PTP_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
/* MMU v3 - XCHAL_HAVE_PTP_MMU == 1 */