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| author | Max Filippov <jcmvbkbc@gmail.com> | 2016-07-25 09:58:10 +0200 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2016-09-21 03:52:51 +0200 |
| commit | 58c3e3ac7a1daf56523567507a096a3e4026596d (patch) | |
| tree | 73eed62674328b843a30af63c96d6281e28090fc /arch/xtensa/kernel | |
| parent | xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config. (diff) | |
| download | linux-58c3e3ac7a1daf56523567507a096a3e4026596d.tar.xz linux-58c3e3ac7a1daf56523567507a096a3e4026596d.zip | |
xtensa: xtfpga: use clock provider, don't update DT
Instead of querying hardcoded FPGA frequency register and then updating
clock-frequency property in specificly named DT nodes in machine setup
code register a clock provider that returns fixed-rate clock, configured
by register specified in DT. This way we have less magic/hardcoded names
and use more existing common clock framework code.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'arch/xtensa/kernel')
0 files changed, 0 insertions, 0 deletions