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| author | Peter Zijlstra <peterz@infradead.org> | 2020-07-29 16:14:21 +0200 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2020-07-29 16:14:21 +0200 |
| commit | f05d67179def83545d257aaff40b974e5915af38 (patch) | |
| tree | 2154a66bb1dc6ebebfe75c81395bfc3d75a0a7f8 /arch/xtensa | |
| parent | Merge tag 'v5.8-rc6' into locking/core, to pick up fixes (diff) | |
| parent | locking/qspinlock: Do not include atomic.h from qspinlock_types.h (diff) | |
| download | linux-f05d67179def83545d257aaff40b974e5915af38.tar.xz linux-f05d67179def83545d257aaff40b974e5915af38.zip | |
Merge branch 'locking/header'
Diffstat (limited to 'arch/xtensa')
| -rw-r--r-- | arch/xtensa/include/asm/atomic.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h index 3e7c6134ed32..744c2f463845 100644 --- a/arch/xtensa/include/asm/atomic.h +++ b/arch/xtensa/include/asm/atomic.h @@ -19,8 +19,6 @@ #include <asm/cmpxchg.h> #include <asm/barrier.h> -#define ATOMIC_INIT(i) { (i) } - /* * This Xtensa implementation assumes that the right mechanism * for exclusion is for locking interrupts to level EXCM_LEVEL. |