diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-14 00:06:09 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-02-21 15:27:02 +0100 |
| commit | 3b61436a792517848ee386bd2ccf4fc3a75f1a0f (patch) | |
| tree | 86c0b6149e5bbdf488aee3f2eb479cc37905e358 /arch | |
| parent | PCMCIA: sa11x0: nanoengine: convert reset handling to use GPIO subsystem (diff) | |
| download | linux-3b61436a792517848ee386bd2ccf4fc3a75f1a0f.tar.xz linux-3b61436a792517848ee386bd2ccf4fc3a75f1a0f.zip | |
PCMCIA: sa11x0: shannon: convert to use new irq/gpio management
Convert Shannon socket driver to use the new irq/gpio management.
This is slightly more involved because we have to touch the private
platform header file to modify the GPIO bitmasks to be GPIO numbers.
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/shannon.h | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h index ec27d6e12140..019f857a7938 100644 --- a/arch/arm/mach-sa1100/include/mach/shannon.h +++ b/arch/arm/mach-sa1100/include/mach/shannon.h @@ -23,14 +23,10 @@ #define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ #define SHANNON_GPIO_DISP_EN GPIO_GPIO (22) /* out */ /* XXX GPIO 23 unaccounted for */ -#define SHANNON_GPIO_EJECT_0 GPIO_GPIO (24) /* in */ -#define SHANNON_IRQ_GPIO_EJECT_0 IRQ_GPIO24 -#define SHANNON_GPIO_EJECT_1 GPIO_GPIO (25) /* in */ -#define SHANNON_IRQ_GPIO_EJECT_1 IRQ_GPIO25 -#define SHANNON_GPIO_RDY_0 GPIO_GPIO (26) /* in */ -#define SHANNON_IRQ_GPIO_RDY_0 IRQ_GPIO26 -#define SHANNON_GPIO_RDY_1 GPIO_GPIO (27) /* in */ -#define SHANNON_IRQ_GPIO_RDY_1 IRQ_GPIO27 +#define SHANNON_GPIO_EJECT_0 24 /* in */ +#define SHANNON_GPIO_EJECT_1 25 /* in */ +#define SHANNON_GPIO_RDY_0 26 /* in */ +#define SHANNON_GPIO_RDY_1 27 /* in */ /* MCP UCB codec GPIO pins... */ |