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| author | David S. Miller <davem@davemloft.net> | 2009-09-10 16:10:59 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-09-10 16:10:59 +0200 |
| commit | 496c07e3b43475124d7f2d77fafbc1f5055abfee (patch) | |
| tree | 51dbc493a8d0569146a12bc9a7d308eb9c7a2017 /arch | |
| parent | sparc64: Provide hypervisor tracing bit support for perf counters. (diff) | |
| download | linux-496c07e3b43475124d7f2d77fafbc1f5055abfee.tar.xz linux-496c07e3b43475124d7f2d77fafbc1f5055abfee.zip | |
sparc64: Provide a way to specify a perf counter overflow IRQ enable bit.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/sparc/kernel/perf_counter.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/sparc/kernel/perf_counter.c b/arch/sparc/kernel/perf_counter.c index d86009fa6f8d..0cd5487b3413 100644 --- a/arch/sparc/kernel/perf_counter.c +++ b/arch/sparc/kernel/perf_counter.c @@ -78,6 +78,7 @@ struct sparc_pmu { int lower_shift; int event_mask; int hv_bit; + int irq_bit; }; static const struct perf_event_map ultra3i_perfmon_event_map[] = { @@ -179,7 +180,8 @@ void hw_perf_disable(void) cpuc->enabled = 0; val = pcr_ops->read(); - val &= ~(PCR_UTRACE | PCR_STRACE | sparc_pmu->hv_bit); + val &= ~(PCR_UTRACE | PCR_STRACE | + sparc_pmu->hv_bit | sparc_pmu->irq_bit); pcr_ops->write(val); } @@ -373,7 +375,7 @@ static int __hw_perf_counter_init(struct perf_counter *counter) * turn off sampling just write 'config', and to enable * things write 'config | config_base'. */ - hwc->config_base = 0; + hwc->config_base = sparc_pmu->irq_bit; if (!attr->exclude_user) hwc->config_base |= PCR_UTRACE; if (!attr->exclude_kernel) |