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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-11 19:56:43 +0100
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 10:12:21 +0100
commit6cebb52094baddd4c167bb5100a7cf6f7bee6910 (patch)
tree5fef397fbb773f7d8aa40aecc303d18ddf88803e /arch
parent[SPARC64]: Fix some Niagara memcpy() bugs. (diff)
downloadlinux-6cebb52094baddd4c167bb5100a7cf6f7bee6910.tar.xz
linux-6cebb52094baddd4c167bb5100a7cf6f7bee6910.zip
[SPARC64]: Fix sun4v early bootup.
prom_sun4v_name should be "sun4v" not "SUNW,sun4v" Also, this is too early to make use of the .sun4v_Xinsn_patch code patching, so just check things manually. This gets us at least to prom_init() on Niagara. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc64/kernel/head.S35
1 files changed, 20 insertions, 15 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index f581f0e917f7..3222c8205b57 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -123,7 +123,7 @@ prom_map_name:
prom_unmap_name:
.asciz "unmap"
prom_sun4v_name:
- .asciz "SUNW,sun4v"
+ .asciz "sun4v"
.align 4
prom_root_compatible:
.skip 64
@@ -300,7 +300,7 @@ sparc64_boot_after_remap:
or %g1, %lo(prom_root_compatible), %g1
sethi %hi(prom_sun4v_name), %g7
or %g7, %lo(prom_sun4v_name), %g7
- mov 10, %g3
+ mov 5, %g3
1: ldub [%g7], %g2
ldub [%g1], %g4
cmp %g2, %g4
@@ -380,28 +380,33 @@ jump_to_sun4u_init:
nop
sun4u_init:
+ BRANCH_IF_SUN4V(g1, sun4v_init)
+
/* Set ctx 0 */
mov PRIMARY_CONTEXT, %g7
-
-661: stxa %g0, [%g7] ASI_DMMU
- .section .sun4v_1insn_patch, "ax"
- .word 661b
- stxa %g0, [%g7] ASI_MMU
- .previous
-
+ stxa %g0, [%g7] ASI_DMMU
membar #Sync
mov SECONDARY_CONTEXT, %g7
+ stxa %g0, [%g7] ASI_DMMU
+ membar #Sync
-661: stxa %g0, [%g7] ASI_DMMU
- .section .sun4v_1insn_patch, "ax"
- .word 661b
+ ba,pt %xcc, sun4u_continue
+ nop
+
+sun4v_init:
+ /* Set ctx 0 */
+ mov PRIMARY_CONTEXT, %g7
stxa %g0, [%g7] ASI_MMU
- .previous
+ membar #Sync
- membar #Sync
+ mov SECONDARY_CONTEXT, %g7
+ stxa %g0, [%g7] ASI_MMU
+ membar #Sync
+ ba,pt %xcc, niagara_tlb_fixup
+ nop
- BRANCH_IF_SUN4V(g1, niagara_tlb_fixup)
+sun4u_continue:
BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
ba,pt %xcc, spitfire_tlb_fixup