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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2015-12-01 04:36:46 +0100
committerMichael Ellerman <mpe@ellerman.id.au>2015-12-14 05:19:10 +0100
commit506b863c68cd6e720037f1548e101932af3bb006 (patch)
treec908e1b0829b645e4d988e00fa6685e68f8cec23 /arch
parentpowerpc/mm: Don't track subpage valid bit in pte_t (diff)
downloadlinux-506b863c68cd6e720037f1548e101932af3bb006.tar.xz
linux-506b863c68cd6e720037f1548e101932af3bb006.zip
powerpc/mm: Remove pte_val usage for the second half of pgtable_t
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/book3s/64/hash-64k.h4
-rw-r--r--arch/powerpc/mm/hash64_64k.c1
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h
index a268416ca4a4..9fca7fae434b 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
@@ -61,6 +61,7 @@
static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep)
{
real_pte_t rpte;
+ unsigned long *hidxp;
rpte.pte = pte;
rpte.hidx = 0;
@@ -70,7 +71,8 @@ static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep)
* check. The store side ordering is done in __hash_page_4K
*/
smp_rmb();
- rpte.hidx = pte_val(*((ptep) + PTRS_PER_PTE));
+ hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
+ rpte.hidx = *hidxp;
}
return rpte;
}
diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c
index f1b86ba63430..8f7328075f04 100644
--- a/arch/powerpc/mm/hash64_64k.c
+++ b/arch/powerpc/mm/hash64_64k.c
@@ -218,7 +218,6 @@ repeat:
* nobody is undating hidx.
*/
hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
- /* __real_pte use pte_val() any idea why ? FIXME!! */
rpte.hidx &= ~(0xfUL << (subpg_index << 2));
*hidxp = rpte.hidx | (slot << (subpg_index << 2));
new_pte = mark_subptegroup_valid(new_pte, subpg_index);