diff options
| author | Lei Wen <leiwen@marvell.com> | 2011-06-21 11:54:18 +0200 |
|---|---|---|
| committer | Eric Miao <eric.y.miao@gmail.com> | 2011-07-06 17:51:22 +0200 |
| commit | d204b2c5b16df935fa9a546c528e168859fddcc0 (patch) | |
| tree | d7558ad5b3ade59bdc11686b3b9d74229255c57d /arch | |
| parent | ARM: pxa: fix PGSR register address calculation (diff) | |
| download | linux-d204b2c5b16df935fa9a546c528e168859fddcc0.tar.xz linux-d204b2c5b16df935fa9a546c528e168859fddcc0.zip | |
ARM: pxa910: correct nand pmu setting
The original pair of <0x01db, 208000000> is invalid.
Correct to the valid value.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Cc: stable@kernel.org
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mmp/pxa910.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c index 8f92ccd26edf..1464607aa60d 100644 --- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c @@ -110,7 +110,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); -static APMU_CLK(nand, NAND, 0x01db, 208000000); +static APMU_CLK(nand, NAND, 0x19b, 156000000); static APMU_CLK(u2o, USB, 0x1b, 480000000); /* device and clock bindings */ |