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authorVikas Sajjan <vikas.sajjan@linaro.org>2013-06-10 10:04:44 +0200
committerKukjin Kim <kgene.kim@samsung.com>2013-06-10 10:22:32 +0200
commit54db6030c9ca8cde74ce2744abaeb483c35c3f96 (patch)
tree46dea014fc34adce31c0b47f389fed829b6b49f4 /arch
parentARM: dts: Add clock provider information for DP controller in Exynos5250 SoC (diff)
downloadlinux-54db6030c9ca8cde74ce2744abaeb483c35c3f96.tar.xz
linux-54db6030c9ca8cde74ce2744abaeb483c35c3f96.zip
ARM: dts: Add display timing node to exynos5250-arndale.dts
Adds display timing node for a DP panel to Arndale Board DTS file Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index f68b82095b80..c371f7c1e912 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -459,4 +459,22 @@
samsung,lane-count = <4>;
};
+ fimd: fimd@14400000 {
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing@0 {
+ /* 2560x1600 DP panel */
+ clock-frequency = <50000>;
+ hactive = <2560>;
+ vactive = <1600>;
+ hfront-porch = <48>;
+ hback-porch = <80>;
+ hsync-len = <32>;
+ vback-porch = <16>;
+ vfront-porch = <8>;
+ vsync-len = <6>;
+ };
+ };
+ };
+
};