diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2014-07-18 11:51:33 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-09-22 13:35:53 +0200 |
| commit | 4b050ba7a66c3ff26cc329ea4db0e9fb2d66a064 (patch) | |
| tree | fa1d1accffcd5bc39694d19e33a9cf82ffd47cc5 /arch | |
| parent | MIPS: cpu-probe: Set the write-combine CCA value on per core basis (diff) | |
| download | linux-4b050ba7a66c3ff26cc329ea4db0e9fb2d66a064.tar.xz linux-4b050ba7a66c3ff26cc329ea4db0e9fb2d66a064.zip | |
MIPS: pgtable.h: Implement the pgprot_writecombine function for MIPS
Previously, the pgprot_writecombine function was simply defined
as pgprot_uncached in include/asm-generic/pgtable.h. This is not
optimal for cores that can actually do write-combine memory writes
so define this function to take into account the core's cache coherency
attribute to achieve such behavior.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7403/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/pgtable.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index df49a308085c..d6d1928539b1 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -366,6 +366,16 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) return __pgprot(prot); } +static inline pgprot_t pgprot_writecombine(pgprot_t _prot) +{ + unsigned long prot = pgprot_val(_prot); + + /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */ + prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine; + + return __pgprot(prot); +} + /* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. |