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authorGabor Juhos <juhosg@openwrt.org>2013-01-29 09:27:03 +0100
committerRalf Baechle <ralf@linux-mips.org>2013-01-30 21:42:41 +0100
commit4c960910e2fb3a301ee4a504fa6b2c5204efeab0 (patch)
treefec5fc33d5c2806baf8099c6c2c9f52db630cad9 /arch
parentMIPS: Lantiq: Fix cp0_perfcount_irq mapping (diff)
downloadlinux-4c960910e2fb3a301ee4a504fa6b2c5204efeab0.tar.xz
linux-4c960910e2fb3a301ee4a504fa6b2c5204efeab0.zip
MIPS: AR724x: Fix AR724X_PCI_MEM_SIZE
The base address of the PCI memory is 0x10000000 and the base address of the PCI configuration space is 0x14000000 on the AR724x SoCs. The AR724X_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that overlaps with the configuration space. The patch fixes the value of the AR724X_PCI_MEM_SIZE constant, in order to avoid this resource conflicts. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4872/ Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/pci/pci-ar724x.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 86d77a666458..c11c75be2d7e 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -21,7 +21,7 @@
#define AR724X_PCI_CTRL_SIZE 0x100
#define AR724X_PCI_MEM_BASE 0x10000000
-#define AR724X_PCI_MEM_SIZE 0x08000000
+#define AR724X_PCI_MEM_SIZE 0x04000000
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c