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authorThomas Gleixner <tglx@linutronix.de>2008-09-04 17:18:44 +0200
committerIngo Molnar <mingo@elte.hu>2008-09-04 17:35:33 +0200
commitcce3e057242d3d46fea07b9eb3910b0076419be5 (patch)
tree020733ab2b7e75063ad78c0f4e1068a0dc56b409 /arch
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmo... (diff)
downloadlinux-cce3e057242d3d46fea07b9eb3910b0076419be5.tar.xz
linux-cce3e057242d3d46fea07b9eb3910b0076419be5.zip
x86: TSC: define the PIT latch value separate
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/tsc.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 346cae5ac423..aa11413e7c1d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -122,6 +122,10 @@ static u64 tsc_read_refs(u64 *pm, u64 *hpet)
return ULLONG_MAX;
}
+#define CAL_MS 50
+#define CAL_LATCH (CLOCK_TICK_RATE / (1000 / CAL_MS))
+#define CAL_PIT_LOOPS 5000
+
/*
* Try to calibrate the TSC against the Programmable
* Interrupt Timer and return the frequency of the TSC
@@ -144,8 +148,8 @@ static unsigned long pit_calibrate_tsc(void)
* (LSB then MSB) to begin countdown.
*/
outb(0xb0, 0x43);
- outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
- outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
+ outb(CAL_LATCH & 0xff, 0x42);
+ outb(CAL_LATCH >> 8, 0x42);
tsc = t1 = t2 = get_cycles();
@@ -166,18 +170,18 @@ static unsigned long pit_calibrate_tsc(void)
/*
* Sanity checks:
*
- * If we were not able to read the PIT more than 5000
+ * If we were not able to read the PIT more than PIT_MIN_LOOPS
* times, then we have been hit by a massive SMI
*
* If the maximum is 10 times larger than the minimum,
* then we got hit by an SMI as well.
*/
- if (pitcnt < 5000 || tscmax > 10 * tscmin)
+ if (pitcnt < CAL_PIT_LOOPS || tscmax > 10 * tscmin)
return ULONG_MAX;
/* Calculate the PIT value */
delta = t2 - t1;
- do_div(delta, 50);
+ do_div(delta, CAL_MS);
return delta;
}