diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-06-06 18:40:58 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 20:31:19 +0200 |
| commit | d5b6f1db5d5a7ba3f2271e5018db7c8c5c4eeea1 (patch) | |
| tree | b5d6c33db67287e91f540d81ff34746839c4bde0 /arch | |
| parent | The DbAu1500 board also support big endian. Gee, imagine that. (diff) | |
| download | linux-d5b6f1db5d5a7ba3f2271e5018db7c8c5c4eeea1.tar.xz linux-d5b6f1db5d5a7ba3f2271e5018db7c8c5c4eeea1.zip | |
For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style)
TLB, so no need to set it separately for each implementation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 1ae7762fd084..2b6db681417d 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -422,7 +422,7 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) config0 = read_c0_config(); if (((config0 & MIPS_CONF_MT) >> 7) == 1) - c->options |= MIPS_CPU_TLB; + c->options |= MIPS_CPU_TLB | MIPS_CPU_4KTLB; isa = (config0 & MIPS_CONF_AT) >> 13; switch (isa) { case 0: @@ -510,7 +510,6 @@ static inline void decode_configs(struct cpuinfo_mips *c) static inline void cpu_probe_mips(struct cpuinfo_mips *c) { decode_configs(c); - c->options |= MIPS_CPU_4KTLB; switch (c->processor_id & 0xff00) { case PRID_IMP_4KC: c->cputype = CPU_4KC; @@ -545,7 +544,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) { decode_configs(c); - c->options |= MIPS_CPU_4KTLB; switch (c->processor_id & 0xff00) { case PRID_IMP_AU1_REV1: case PRID_IMP_AU1_REV2: @@ -576,7 +574,6 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) { decode_configs(c); - c->options |= MIPS_CPU_4KTLB; switch (c->processor_id & 0xff00) { case PRID_IMP_SB1: c->cputype = CPU_SB1; @@ -591,7 +588,6 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c) { decode_configs(c); - c->options |= MIPS_CPU_4KTLB; switch (c->processor_id & 0xff00) { case PRID_IMP_SR71000: c->cputype = CPU_SR71000; |