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authorOliver Pinter <oliver.pntr@gmail.com>2007-10-17 18:04:36 +0200
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-17 20:15:59 +0200
commit75e3808b67f88cdd8c531dda3e00deb3623a3dac (patch)
tree5eb3ee2b3f7b18ed4e77af4c7b52cc10ddcd528e /arch
parenti386: Clean up duplicate includes in arch/i386/xen/ (diff)
downloadlinux-75e3808b67f88cdd8c531dda3e00deb3623a3dac.tar.xz
linux-75e3808b67f88cdd8c531dda3e00deb3623a3dac.zip
x86: add cpu codenames for Kconfig.cpu
add cpu core name for arch/i386/Kconfig.cpu:Pentium 4 sections help add Pentium D for arch/i386/Kconfig.cpu add Pentium D for arch/x86_64/Kconfig AK: Clarified some of the descriptions [ tglx: arch/x86 adaptation ] Signed-off-by: Oliver Pinter <oliver.pntr@gmail.com> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/Kconfig.cpu36
-rw-r--r--arch/x86_64/Kconfig11
2 files changed, 35 insertions, 12 deletions
diff --git a/arch/i386/Kconfig.cpu b/arch/i386/Kconfig.cpu
index 11a24d54f27b..0e2adadf5905 100644
--- a/arch/i386/Kconfig.cpu
+++ b/arch/i386/Kconfig.cpu
@@ -109,16 +109,42 @@ config MCORE2
help
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
CPUs. You can distinguish newer from older Xeons by the CPU family
- in /proc/cpuinfo. Newer ones have 6.
+ in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
config MPENTIUM4
bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
help
Select this for Intel Pentium 4 chips. This includes the
- Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
- (not Pentium M) chips. This option enables compile flags
- optimized for the chip, uses the correct cache shift, and
- applies any applicable Pentium III optimizations.
+ Pentium 4, Pentium D, P4-based Celeron and Xeon, and
+ Pentium-4 M (not Pentium M) chips. This option enables compile
+ flags optimized for the chip, uses the correct cache line size, and
+ applies any applicable optimizations.
+
+ CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
+
+ Select this for:
+ Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
+ -Willamette
+ -Northwood
+ -Mobile Pentium 4
+ -Mobile Pentium 4 M
+ -Extreme Edition (Gallatin)
+ -Prescott
+ -Prescott 2M
+ -Cedar Mill
+ -Presler
+ -Smithfiled
+ Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
+ -Foster
+ -Prestonia
+ -Gallatin
+ -Nocona
+ -Irwindale
+ -Cranford
+ -Potomac
+ -Paxville
+ -Dempsey
+
config MK6
bool "K6/K6-II/K6-III"
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index d681be88ae5d..85f958c2f555 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -175,14 +175,12 @@ config MK8
config MPSC
bool "Intel P4 / older Netburst based Xeon"
help
- Optimize for Intel Pentium 4 and older Nocona/Dempsey Xeon CPUs
- with Intel Extended Memory 64 Technology(EM64T). For details see
- <http://www.intel.com/technology/64bitextensions/>.
+ Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
+ Xeon CPUs with Intel 64bit which is compatible with x86-64.
Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
Netburst core and shouldn't use this option. You can distinguish them
using the cpu family field
- in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one
- (this rule only applies to systems that support EM64T)
+ in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
config MCORE2
bool "Intel Core2 / newer Xeon"
@@ -190,8 +188,7 @@ config MCORE2
Optimize for Intel Core2 and newer Xeons (51xx)
You can distinguish the newer Xeons from the older ones using
the cpu family field in /proc/cpuinfo. 15 is an older Xeon
- (use CONFIG_MPSC then), 6 is a newer one. This rule only
- applies to CPUs that support EM64T.
+ (use CONFIG_MPSC then), 6 is a newer one.
config GENERIC_CPU
bool "Generic-x86-64"