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authormarkus.t.metzger@intel.com <markus.t.metzger@intel.com>2009-09-02 16:04:47 +0200
committerIngo Molnar <mingo@elte.hu>2009-09-04 09:26:39 +0200
commit596da17f94c103348ebe04129c00d536ea0e80e2 (patch)
treeac6366d311f403e400e6933d0ccc2b424f217080 /arch
parentx86, perf_counter, bts: Fail if BTS is not available (diff)
downloadlinux-596da17f94c103348ebe04129c00d536ea0e80e2.tar.xz
linux-596da17f94c103348ebe04129c00d536ea0e80e2.zip
x86, perf_counter, bts: Correct pointer-to-u64 casts
On 32bit, pointers in the DS AREA configuration are cast to u64. The current (long) cast to avoid compiler warnings results in a signed 64bit address. Signed-off-by: Markus Metzger <markus.t.metzger@intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <20090902140615.305889000@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/perf_counter.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 2f41874ffb86..3776b0b630c8 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -726,7 +726,8 @@ static inline void init_debug_store_on_cpu(int cpu)
return;
wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA,
- (u32)((u64)(long)ds), (u32)((u64)(long)ds >> 32));
+ (u32)((u64)(unsigned long)ds),
+ (u32)((u64)(unsigned long)ds >> 32));
}
static inline void fini_debug_store_on_cpu(int cpu)
@@ -757,7 +758,7 @@ static void release_bts_hardware(void)
per_cpu(cpu_hw_counters, cpu).ds = NULL;
- kfree((void *)(long)ds->bts_buffer_base);
+ kfree((void *)(unsigned long)ds->bts_buffer_base);
kfree(ds);
}
@@ -788,7 +789,7 @@ static int reserve_bts_hardware(void)
break;
}
- ds->bts_buffer_base = (u64)(long)buffer;
+ ds->bts_buffer_base = (u64)(unsigned long)buffer;
ds->bts_index = ds->bts_buffer_base;
ds->bts_absolute_maximum =
ds->bts_buffer_base + BTS_BUFFER_SIZE;
@@ -1491,7 +1492,7 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
};
struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS];
unsigned long orig_ip = data->regs->ip;
- u64 at;
+ struct bts_record *at, *top;
if (!counter)
return;
@@ -1499,19 +1500,18 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
if (!ds)
return;
- for (at = ds->bts_buffer_base;
- at < ds->bts_index;
- at += sizeof(struct bts_record)) {
- struct bts_record *rec = (struct bts_record *)(long)at;
+ at = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
+ top = (struct bts_record *)(unsigned long)ds->bts_index;
- data->regs->ip = rec->from;
- data->addr = rec->to;
+ ds->bts_index = ds->bts_buffer_base;
+
+ for (; at < top; at++) {
+ data->regs->ip = at->from;
+ data->addr = at->to;
perf_counter_output(counter, 1, data);
}
- ds->bts_index = ds->bts_buffer_base;
-
data->regs->ip = orig_ip;
data->addr = 0;