diff options
| author | Kefeng Wang <wangkefeng.wang@huawei.com> | 2016-01-29 09:39:04 +0100 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2016-02-25 14:15:58 +0100 |
| commit | 8f41d122bfb64de9dcd6e5815ed08544905fa533 (patch) | |
| tree | 79c61ce1d328c93015176c31fdae92df0f2f4df2 /arch | |
| parent | arm64: dts: hip05: Append all gicv3 ITS entries (diff) | |
| download | linux-8f41d122bfb64de9dcd6e5815ed08544905fa533.tar.xz linux-8f41d122bfb64de9dcd6e5815ed08544905fa533.zip | |
arm64: dts: hip05: Append gpio nodes
There are two dw GPIO controllers in hip05 peri sub, this patch
adds the corresponding device tree nodes.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hip05.dtsi | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index c1b1a32939ed..6319ff3b03ea 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -322,5 +322,43 @@ reg-io-width = <4>; status = "disabled"; }; + + peri_gpio0: gpio@802e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x802e0000 0x0 0x10000>; + status = "disabled"; + + porta: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + peri_gpio1: gpio@802f0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dw-apb-gpio"; + reg = <0x0 0x802f0000 0x0 0x10000>; + status = "disabled"; + + portb: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>; + }; + }; }; }; |