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authorMaciej W. Rozycki <macro@linux-mips.org>2015-04-04 00:27:21 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-04-08 01:10:24 +0200
commit9cb60e202631d71b7b8d38fa84ae7663805244b6 (patch)
tree6bd049de54e05075d438218dcdaaf3ff626cca92 /arch
parentMIPS: Set `si_code' for SIGFPE signals sent from emulation too (diff)
downloadlinux-9cb60e202631d71b7b8d38fa84ae7663805244b6.tar.xz
linux-9cb60e202631d71b7b8d38fa84ae7663805244b6.zip
MIPS: Correct ISA masking in FPU feature determination
Correct an ISA level determination problem introduced with 8b8aa636 [MIPS: kernel: cpu-probe.c: Add support for MIPS R6], reverting explicit masking against individual `MIPS_CPU_ISA_*' macros in FPU feature determination. Feature macros such as `cpu_has_mips_r' cannot be used here, because they operate on CPU #0 and we want to refer to the current CPU instead. They cannot be used for masking against the current CPU either because they mask against CPU #0 too, e.g.: # define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/cpu-probe.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 2f8fe8d4c7ca..f8481ce7bbb1 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1374,7 +1374,9 @@ void cpu_probe(void)
if (c->options & MIPS_CPU_FPU) {
c->fpu_id = cpu_get_fpu_id();
- if (c->isa_level & cpu_has_mips_r) {
+ if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 |
+ MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 |
+ MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6)) {
if (c->fpu_id & MIPS_FPIR_3D)
c->ases |= MIPS_ASE_MIPS3D;
if (c->fpu_id & MIPS_FPIR_FREP)