diff options
| author | Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> | 2018-08-22 19:16:05 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-08-23 13:56:48 +0200 |
| commit | f08d08f3db55452d31ba4a37c702da6245876b96 (patch) | |
| tree | 288a41b58b8e75c13572658eb8898aa220ebcd7e /arch | |
| parent | powerpc/mm/books3s: Add new pte bit to mark pte temporarily invalid. (diff) | |
| download | linux-f08d08f3db55452d31ba4a37c702da6245876b96.tar.xz linux-f08d08f3db55452d31ba4a37c702da6245876b96.zip | |
powerpc/mm/radix: Only need the Nest MMU workaround for R -> RW transition
The Nest MMU workaround is only needed for RW upgrades. Avoid doing
that for other PTE updates.
We also avoid clearing the PTE while marking it invalid. This is
because other page table walkers will find this PTE none and can
result in unexpected behaviour due to that. Instead we clear
_PAGE_PRESENT and set the software PTE bit _PAGE_INVALID.
pte_present() is already updated to check for both bits. This makes
sure page table walkers will find the PTE present and things like
pte_pfn(pte) returns the right value.
Based on an original patch from Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/mm/pgtable-radix.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c index 7be99fd9af15..c879979faa73 100644 --- a/arch/powerpc/mm/pgtable-radix.c +++ b/arch/powerpc/mm/pgtable-radix.c @@ -1045,20 +1045,22 @@ void radix__ptep_set_access_flags(struct vm_area_struct *vma, pte_t *ptep, struct mm_struct *mm = vma->vm_mm; unsigned long set = pte_val(entry) & (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); + + unsigned long change = pte_val(entry) ^ pte_val(*ptep); /* * To avoid NMMU hang while relaxing access, we need mark * the pte invalid in between. */ - if (atomic_read(&mm->context.copros) > 0) { + if ((change & _PAGE_RW) && atomic_read(&mm->context.copros) > 0) { unsigned long old_pte, new_pte; - old_pte = __radix_pte_update(ptep, ~0, 0); + old_pte = __radix_pte_update(ptep, _PAGE_PRESENT, _PAGE_INVALID); /* * new value of pte */ new_pte = old_pte | set; radix__flush_tlb_page_psize(mm, address, psize); - __radix_pte_update(ptep, 0, new_pte); + __radix_pte_update(ptep, _PAGE_INVALID, new_pte); } else { __radix_pte_update(ptep, 0, set); /* |