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authorJohn Linn <john.linn@xilinx.com>2008-07-03 16:05:04 +0200
committerGrant Likely <grant.likely@secretlab.ca>2008-07-04 08:59:02 +0200
commit39fd0e92b3dc864f36c1253006b8b831844d36f1 (patch)
treedc3e2a38a74148d1aab130adeb8ba1843cc1c542 /arch
parentpowerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440 (diff)
downloadlinux-39fd0e92b3dc864f36c1253006b8b831844d36f1.tar.xz
linux-39fd0e92b3dc864f36c1253006b8b831844d36f1.zip
powerpc/virtex: add Xilinx Virtex 5 ppc440 platform support
Support for the Xilinx Virtex5 FXT 440 is being added. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/44x/Kconfig26
-rw-r--r--arch/powerpc/platforms/44x/Makefile1
-rw-r--r--arch/powerpc/platforms/44x/virtex.c60
3 files changed, 87 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index bee49ca704ef..249ba01c6674 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -111,6 +111,22 @@ config YOSEMITE
# help
# This option enables support for the IBM PPC440GX evaluation board.
+config XILINX_VIRTEX440_GENERIC_BOARD
+ bool "Generic Xilinx Virtex 440 board"
+ depends on 44x
+ default n
+ select XILINX_VIRTEX_5_FXT
+ help
+ This option enables generic support for Xilinx Virtex based boards
+ that use a 440 based processor in the Virtex 5 FXT FPGA architecture.
+
+ The generic virtex board support matches any device tree which
+ specifies 'xlnx,virtex440' in its compatible field. This includes
+ the Xilinx ML5xx reference designs using the powerpc core.
+
+ Most Virtex 5 designs should use this unless it needs to do some
+ special configuration at board probe time.
+
# 44x specific CPU modules, selected based on the board above.
config 440EP
bool
@@ -161,3 +177,13 @@ config 460EX
# 44x errata/workaround config symbols, selected by the CPU models above
config IBM440EP_ERR42
bool
+
+# Xilinx specific config options.
+config XILINX_VIRTEX
+ bool
+
+# Xilinx Virtex 5 FXT FPGA architecture, selected by a Xilinx board above
+config XILINX_VIRTEX_5_FXT
+ bool
+ select XILINX_VIRTEX
+
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 4e71e77f9a23..8d0b1a192d62 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_RAINIER) += rainier.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_WARP) += warp-nand.o
obj-$(CONFIG_CANYONLANDS) += canyonlands.o
+obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/virtex.c b/arch/powerpc/platforms/44x/virtex.c
new file mode 100644
index 000000000000..68637faf70ae
--- /dev/null
+++ b/arch/powerpc/platforms/44x/virtex.c
@@ -0,0 +1,60 @@
+/*
+ * Xilinx Virtex 5FXT based board support, derived from
+ * the Xilinx Virtex (IIpro & 4FX) based board support
+ *
+ * Copyright 2007 Secret Lab Technologies Ltd.
+ * Copyright 2008 Xilinx, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+#include <asm/xilinx_intc.h>
+#include <asm/reg.h>
+#include <asm/ppc4xx.h>
+#include "44x.h"
+
+static struct of_device_id xilinx_of_bus_ids[] __initdata = {
+ { .compatible = "simple-bus", },
+ { .compatible = "xlnx,plb-v46-1.00.a", },
+ { .compatible = "xlnx,plb-v46-1.02.a", },
+ { .compatible = "xlnx,plb-v34-1.01.a", },
+ { .compatible = "xlnx,plb-v34-1.02.a", },
+ { .compatible = "xlnx,opb-v20-1.10.c", },
+ { .compatible = "xlnx,dcr-v29-1.00.a", },
+ { .compatible = "xlnx,compound", },
+ {}
+};
+
+static int __init virtex_device_probe(void)
+{
+ of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(virtex, virtex_device_probe);
+
+static int __init virtex_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "xlnx,virtex440"))
+ return 0;
+
+ return 1;
+}
+
+define_machine(virtex) {
+ .name = "Xilinx Virtex440",
+ .probe = virtex_probe,
+ .init_IRQ = xilinx_intc_init_tree,
+ .get_irq = xilinx_intc_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+ .restart = ppc4xx_reset_system,
+};