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| author | David Daney <david.daney@cavium.com> | 2011-09-24 02:29:54 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-10-25 00:34:25 +0200 |
| commit | 074ef0d2752a54a73f0e368fad458e4b5a57c5f8 (patch) | |
| tree | 657167addc8f3747e7bbee25766402daf402d31f /arch | |
| parent | MIPS: XLR, XLS: Add comment for smp setup (diff) | |
| download | linux-074ef0d2752a54a73f0e368fad458e4b5a57c5f8.tar.xz linux-074ef0d2752a54a73f0e368fad458e4b5a57c5f8.zip | |
MIPS: Add more CPU identifiers for Octeon II CPUs.
The CPU identifiers for cn68XX, cn66XX and cn61XX are known, so add
them.
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2776/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 5f95a4bfc735..2f7f41873f24 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -135,6 +135,9 @@ #define PRID_IMP_CAVIUM_CN50XX 0x0600 #define PRID_IMP_CAVIUM_CN52XX 0x0700 #define PRID_IMP_CAVIUM_CN63XX 0x9000 +#define PRID_IMP_CAVIUM_CN68XX 0x9100 +#define PRID_IMP_CAVIUM_CN66XX 0x9200 +#define PRID_IMP_CAVIUM_CN61XX 0x9300 /* * These are the PRID's for when 23:16 == PRID_COMP_INGENIC |