diff options
| author | Javier Martinez Canillas <javier.martinez@collabora.co.uk> | 2014-04-24 18:53:50 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2014-04-25 18:30:00 +0200 |
| commit | ef139e130c8a18cc6cdaa2d98899f74e14389bd4 (patch) | |
| tree | 12164229d2c6ae1d053d3a0d957d4a9f227b5c19 /arch | |
| parent | ARM: dts: Fix GPMC timings for LAN9220 (diff) | |
| download | linux-ef139e130c8a18cc6cdaa2d98899f74e14389bd4.tar.xz linux-ef139e130c8a18cc6cdaa2d98899f74e14389bd4.zip | |
ARM: dts: omap3-igep0020: use SMSC9221 timings
The IGEPv2 board has a SMSC LAN9221i ethernet chip and not a
SMSC LAN911x connected to the GPMC. Each chip needs different
timings in order to operate correctly so is wrong to include
omap-gpmc-smsc911x.dtsi instead of omap-gpmc-smsc9221.dtsi.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
[tony@atomide.com: this is needed to avoid potential memory corruption]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/omap3-igep.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap3-igep0020.dts | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index b97736d98a64..e2d163bf0619 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -107,7 +107,7 @@ >; }; - smsc911x_pins: pinmux_smsc911x_pins { + smsc9221_pins: pinmux_smsc9221_pins { pinctrl-single,pins = < 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ >; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 7abd64f6ae21..b22caaaf774b 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -10,7 +10,7 @@ */ #include "omap3-igep.dtsi" -#include "omap-gpmc-smsc911x.dtsi" +#include "omap-gpmc-smsc9221.dtsi" / { model = "IGEPv2 (TI OMAP AM/DM37x)"; @@ -248,7 +248,7 @@ ethernet@gpmc { pinctrl-names = "default"; - pinctrl-0 = <&smsc911x_pins>; + pinctrl-0 = <&smsc9221_pins>; reg = <5 0 0xff>; interrupt-parent = <&gpio6>; interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |