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| author | Thomas Gleixner <tglx@linutronix.de> | 2016-02-22 19:31:44 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-02-22 19:31:44 +0100 |
| commit | 253baffdcefba73011e6d2102e69e0b86547836f (patch) | |
| tree | 59295989b94241595716d5174f2ba1b670c8616b /arch | |
| parent | Merge tag 'irqchip-urgent-4.5' of git://git.infradead.org/users/jcooper/linux... (diff) | |
| parent | irqchip/gic-v3: Add missing barrier to 32bit version of gic_read_iar() (diff) | |
| download | linux-253baffdcefba73011e6d2102e69e0b86547836f.tar.xz linux-253baffdcefba73011e6d2102e69e0b86547836f.zip | |
Merge tag 'gic-fixes-4.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull GIC fixes for 4.5-rc5 from Marc Zyngier:
- EOI handling for LPIs when GICv3 is in EOImode==1
- Another fallout from changing page size while allocating ITS tables
- Missing memory barrier in the 32bit GICv3 code
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch_gicv3.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h index 7da5503c0591..e08d15184056 100644 --- a/arch/arm/include/asm/arch_gicv3.h +++ b/arch/arm/include/asm/arch_gicv3.h @@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void) u32 irqstat; asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); + dsb(sy); return irqstat; } |