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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-04-04 22:36:35 +0200 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-06-02 00:48:41 +0200 |
commit | 4419496884ed16fdeb122782d41f5ad38f8923cc (patch) | |
tree | a1d209bffbe3317c0c5a63f21e86fc4802df4275 /arch | |
parent | ARM: proc-v7: move CPU errata out of line (diff) | |
download | linux-4419496884ed16fdeb122782d41f5ad38f8923cc.tar.xz linux-4419496884ed16fdeb122782d41f5ad38f8923cc.zip |
ARM: proc-v7: clean up MIDR access
We already have the main ID register available in r9, there's no need
to refetch it. Use the saved value.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mm/proc-v7.S | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 48031ee36e4c..19c1c8b7c3bb 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -409,14 +409,13 @@ __v7_setup: bl v7_flush_dcache_louis ldmia r12, {r0-r5, r7, r9, r11, lr} - mrc p15, 0, r0, c0, c0, 0 @ read main ID register - and r10, r0, #0xff000000 @ ARM? + and r10, r9, #0xff000000 @ ARM? teq r10, #0x41000000 bne __errata_finish - and r3, r0, #0x00f00000 @ variant - and r6, r0, #0x0000000f @ revision + and r3, r9, #0x00f00000 @ variant + and r6, r9, #0x0000000f @ revision orr r6, r6, r3, lsr #20-4 @ combine variant and revision - ubfx r0, r0, #4, #12 @ primary part number + ubfx r0, r9, #4, #12 @ primary part number /* Cortex-A8 Errata */ ldr r10, =0x00000c08 @ Cortex-A8 primary part number |