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| author | Florian Fainelli <f.fainelli@gmail.com> | 2015-04-17 20:27:51 +0200 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2015-05-13 19:00:10 +0200 |
| commit | 9f98802911cf784433546791838102a9d3c97d92 (patch) | |
| tree | 4a1e3166887c4c134a94b1e0c05aec8767001957 /arch | |
| parent | Documentation: DT: Document SMP DT nodes and properties for BCM63138 (diff) | |
| download | linux-9f98802911cf784433546791838102a9d3c97d92.tar.xz linux-9f98802911cf784433546791838102a9d3c97d92.zip | |
ARM: dts: BCM63xx: Add SMP nodes and required properties
Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/bcm63138.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi index f5b5c528c26c..bcc0089b0150 100644 --- a/arch/arm/boot/dts/bcm63138.dtsi +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -26,6 +26,7 @@ compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0>; + enable-method = "brcm,bcm63138"; }; cpu@1 { @@ -33,6 +34,8 @@ compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <1>; + enable-method = "brcm,bcm63138"; + resets = <&pmb0 4 1>; }; }; @@ -143,5 +146,10 @@ clock-names = "periph"; status = "disabled"; }; + + bootlut: bootlut@8000 { + compatible = "brcm,bcm63138-bootlut"; + reg = <0x8000 0x50>; + }; }; }; |