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authorWill Deacon <will.deacon@arm.com>2015-05-01 18:15:23 +0200
committerWill Deacon <will.deacon@arm.com>2015-05-12 17:50:21 +0200
commit4801ba338acad2e69e905e0c537e8ba2682c4e65 (patch)
treed2a036987dc6095caa7a884fc04804e52532a0e3 /arch
parentarm64: bpf: fix signedness bug in loading 64-bit immediate (diff)
downloadlinux-4801ba338acad2e69e905e0c537e8ba2682c4e65.tar.xz
linux-4801ba338acad2e69e905e0c537e8ba2682c4e65.zip
arm64: perf: fix memory leak when probing PMU PPIs
Commit d795ef9aa831 ("arm64: perf: don't warn about missing interrupt-affinity property for PPIs") added a check for PPIs so that we avoid parsing the interrupt-affinity property for these naturally affine interrupts. Unfortunately, this check can trigger an early (successful) return and we will leak the irqs array. This patch fixes the issue by reordering the code so that the check is performed before any independent allocation. Reported-by: David Binderman <dcb314@hotmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/kernel/perf_event.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 23f25acf43a9..cce18c85d2e8 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -1315,15 +1315,15 @@ static int armpmu_device_probe(struct platform_device *pdev)
if (!cpu_pmu)
return -ENODEV;
- irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
- if (!irqs)
- return -ENOMEM;
-
/* Don't bother with PPIs; they're already affine */
irq = platform_get_irq(pdev, 0);
if (irq >= 0 && irq_is_percpu(irq))
return 0;
+ irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
+ if (!irqs)
+ return -ENOMEM;
+
for (i = 0; i < pdev->num_resources; ++i) {
struct device_node *dn;
int cpu;