diff options
| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-06-26 10:06:26 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2020-06-30 01:08:00 +0200 |
| commit | 54320dcaa2522db3222c02d68b52cfed32a2e95b (patch) | |
| tree | 6a2b005b119e60596a3f86581ee929bc027804e8 /arch | |
| parent | arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency (diff) | |
| download | linux-54320dcaa2522db3222c02d68b52cfed32a2e95b.tar.xz linux-54320dcaa2522db3222c02d68b52cfed32a2e95b.zip | |
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache-controller@c4200000: $nodename:0:
'l2-cache-controller@c4200000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200626080626.4080-1-krzk@kernel.org
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/meson.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index ae89deaa8c9c..91129dc70d83 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -11,7 +11,7 @@ #size-cells = <1>; interrupt-parent = <&gic>; - L2: l2-cache-controller@c4200000 { + L2: cache-controller@c4200000 { compatible = "arm,pl310-cache"; reg = <0xc4200000 0x1000>; cache-unified; |