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author | Marc Zyngier <maz@kernel.org> | 2022-03-09 12:16:48 +0100 |
---|---|---|
committer | Marc Zyngier <maz@kernel.org> | 2022-03-09 12:16:48 +0100 |
commit | 7297a8bcc0aea2e69bc18e2731d6754f34e77aac (patch) | |
tree | aba52b6b02d2165b7f002ebcb9a0b0c8396b3e1f /arch | |
parent | Merge branch kvm-arm64/psci-1.1 into kvmarm-master/next (diff) | |
parent | Documentation: KVM: Update documentation to indicate KVM is arm64-only (diff) | |
download | linux-7297a8bcc0aea2e69bc18e2731d6754f34e77aac.tar.xz linux-7297a8bcc0aea2e69bc18e2731d6754f34e77aac.zip |
Merge branch kvm-arm64/misc-5.18 into kvmarm-master/next
* kvm-arm64/misc-5.18:
: .
: Misc fixes for KVM/arm64 5.18:
:
: - Drop unused kvm parameter to kvm_psci_version()
:
: - Implement CONFIG_DEBUG_LIST at EL2
:
: - Make CONFIG_ARM64_ERRATUM_2077057 default y
:
: - Only do the interrupt dance if we have exited because of an interrupt
:
: - Remove traces of 32bit ARM host support from the documentation
: .
Documentation: KVM: Update documentation to indicate KVM is arm64-only
KVM: arm64: Only open the interrupt window on exit due to an interrupt
KVM: arm64: Enable Cortex-A510 erratum 2077057 by default
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm64/kvm/arm.c | 8 |
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index cbcd42decb2a..ae706cab97a5 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -682,6 +682,7 @@ config ARM64_ERRATUM_2051678 config ARM64_ERRATUM_2077057 bool "Cortex-A510: 2077057: workaround software-step corrupting SPSR_EL2" + default y help This option adds the workaround for ARM Cortex-A510 erratum 2077057. Affected Cortex-A510 may corrupt SPSR_EL2 when the a step exception is diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index fefd5774ab55..f49ebdd9c990 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -887,9 +887,11 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) * context synchronization event) is necessary to ensure that * pending interrupts are taken. */ - local_irq_enable(); - isb(); - local_irq_disable(); + if (ARM_EXCEPTION_CODE(ret) == ARM_EXCEPTION_IRQ) { + local_irq_enable(); + isb(); + local_irq_disable(); + } guest_timing_exit_irqoff(); |