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authorThomas Gleixner <tglx@linutronix.de>2009-06-08 19:10:25 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-08 23:10:42 +0200
commit820a644211bc1ac7715333abdb0f0b9ea4fbb549 (patch)
tree75325c7392c0a0b56310770633c10f7e1d9c1d48 /arch
parentperf_counter, x86: Implement generalized cache event types, add AMD support (diff)
downloadlinux-820a644211bc1ac7715333abdb0f0b9ea4fbb549.tar.xz
linux-820a644211bc1ac7715333abdb0f0b9ea4fbb549.zip
perf_counter, x86: Clean up hw_cache_event ids copies
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/perf_counter.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 93af821ebe51..56001feeffcd 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -1409,23 +1409,20 @@ static int intel_pmu_init(void)
switch (boot_cpu_data.x86_model) {
case 17:
memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
- sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
- PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);
+ sizeof(hw_cache_event_ids));
pr_cont("Core2 events, ");
break;
default:
case 26:
memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
- sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
- PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);
+ sizeof(hw_cache_event_ids));
pr_cont("Nehalem/Corei7 events, ");
break;
case 28:
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
- sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
- PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);
+ sizeof(hw_cache_event_ids));
pr_cont("Atom events, ");
break;