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author | Will Deacon <will.deacon@arm.com> | 2015-10-06 19:46:30 +0200 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-10-07 12:56:37 +0200 |
commit | 120798d2e7d1ac87365fe5ea91b074bb42ca1eff (patch) | |
tree | a9bbb2808e0514e6e5507c3281e00c45766e874a /arch | |
parent | arm64: tlb: remove redundant barrier from __flush_tlb_pgtable (diff) | |
download | linux-120798d2e7d1ac87365fe5ea91b074bb42ca1eff.tar.xz linux-120798d2e7d1ac87365fe5ea91b074bb42ca1eff.zip |
arm64: mm: remove dsb from update_mmu_cache
update_mmu_cache() consists of a dsb(ishst) instruction so that new user
mappings are guaranteed to be visible to the page table walker on
exception return.
In reality this can be a very expensive operation which is rarely needed.
Removing this barrier shows a modest improvement in hackbench scores and
, in the worst case, we re-take the user fault and establish that there
was nothing to do.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/include/asm/pgtable.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 581d1406ba28..5043a84e724e 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -646,10 +646,10 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) { /* - * set_pte() does not have a DSB for user mappings, so make sure that - * the page table write is visible. + * We don't do anything here, so there's a very small chance of + * us retaking a user fault which we just fixed up. The alternative + * is doing a dsb(ishst), but that penalises the fastpath. */ - dsb(ishst); } #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0) |