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authorStefan Agner <stefan@agner.ch>2014-07-16 08:08:49 +0200
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 10:49:47 +0200
commit69603fbbc4798e8d02cb822edf5dce3f8a625427 (patch)
treeffc32acf1cd83d592fe196b6fc9ccf8da25d7598 /arch
parentARM: dts: add initial Rex Basic board support (diff)
downloadlinux-69603fbbc4798e8d02cb822edf5dce3f8a625427.tar.xz
linux-69603fbbc4798e8d02cb822edf5dce3f8a625427.zip
ARM: dts: vf610: add FlexCAN node
Add FlexCAN node for the two FlexCAN IP instances in Vybrid. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/vf610.dtsi23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 6a6190ce2318..583dd363c9dc 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -14,6 +14,8 @@
/ {
aliases {
+ can0 = &can0;
+ can1 = &can1;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -103,6 +105,16 @@
<&clks VF610_CLK_DMAMUX1>;
};
+ can0: flexcan@40020000 {
+ compatible = "fsl,vf610-flexcan";
+ reg = <0x40020000 0x4000>;
+ interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_FLEXCAN0>,
+ <&clks VF610_CLK_FLEXCAN0>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart0: serial@40027000 {
compatible = "fsl,vf610-lpuart";
reg = <0x40027000 0x1000>;
@@ -405,6 +417,17 @@
clock-names = "ipg", "ahb", "ptp";
status = "disabled";
};
+
+ can1: flexcan@400d4000 {
+ compatible = "fsl,vf610-flexcan";
+ reg = <0x400d4000 0x4000>;
+ interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_FLEXCAN1>,
+ <&clks VF610_CLK_FLEXCAN1>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
};
};
};