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| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-07-11 23:52:43 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-07-15 06:22:45 +0200 |
| commit | e0c3f92a08f3e0a95024d0d032564fdc1ee96f54 (patch) | |
| tree | 414ef8cad61e82349b32e0ea405aec3db8a44ce0 /arch | |
| parent | ARM: dts: r8a7792: add PLL1 divided by 2 clock (diff) | |
| download | linux-e0c3f92a08f3e0a95024d0d032564fdc1ee96f54.tar.xz linux-e0c3f92a08f3e0a95024d0d032564fdc1ee96f54.zip | |
ARM: dts: r8a7792: remove ADSP clock
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect
table in the most recent R-Car gen2 manual. But when I received that manual
I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't
have ADSP at all. Accordingly remove the ADSP clock from DT for the
r8a7792.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/r8a7792.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index d5fd0762e2d6..3fd61d7ab906 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -279,7 +279,7 @@ clocks = <&extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", - "lb", "qspi", "z", "adsp"; + "lb", "qspi", "z"; #power-domain-cells = <0>; }; |